1. Field of the Invention
The present invention relates generally to timing circuits and, more particularly, to a high density low power electrical circuit utilizing CMOS technology for measuring the time interval between the occurrence of an initial electrical pulse and a subsequent electrical pulse.
2. Description of the Prior Art
Generally speaking, size, weight and power consumption are of prime importance when designing electrical or electronic circuits. For example, airborne telemeter systems are continually driven by a need to use light-weight electronic circuits occupying minimum volume. In addition to physical size and weight considerations, electronic circuit power consumption must also be reduced both to reduce power supply volume and to minimize thermal effects due to electronic component heating. Because size, weight and power consumption requirements are often difficult to control in combination within the same electronic circuit, tradeoffs in circuit design are often made which result in less-than-optimum circuit performance.
The time interval counter is an example of an electronic circuit or device used in many industrial and military applications but which currently performs in a less-than-optimum manner because of difficulties in balancing device size, weight and power consumption requirements. As known in the art, the time interval counter is an electronic device operable to provide a measure of the time interval between the occurrence of a first electrical signal or pulse and a second, subsequent electrical signal or pulse. One of the major reasons why time interval counters presently in use perform less than satisfactorily is because the methods used to determine the time interval between electrical signals make it difficult to efficiently balance circuit size, weight and power consumption. In many systems of interest, time interval counters are required which are operable to perform time interval measurements of up to ten microseconds in duration with less than five nanoseconds of accuracy. The traditional method for making this measurement utilizes a counter circuit which counts clock pulses of a frequency sufficiently high to achieve the desired resolution (greater than two hundred megahertz). The counter is enabled with the first timing pulse and disabled with the second timing pulse. One of the characteristics of electronic circuits capable of operating at greater than two hundred megahertz resolution is extremely high power consumption, which is undesirable for many time interval counter applications. Other time interval determination methods use various techniques to allow the use of a lower frequency clock, e.g., time to pulse height converters, linear pulse stretchers and vernier techniques, but these suffer from high power requirement problems and have insufficient dynamic range for the requirements of many time interval measurement applications. Circuits using the above methods have been described in the open literature. However, these circuits were designed for radiation counting experiments requiring five to twenty picosecond resolution, and implementation is achieved utilizing discrete transistors and Emitter Coupled Logic (ECL) integrated circuits. Little consideration is given in this application to minimizing volume and power consumption, and the circuit topologies used are not optimized for implementation in low power Complimentary Metal Oxide Semiconductor (CMOS) logic, which would greatly reduce the overall size of the circuit. The problem with power dissipation is further exacerbated if efforts are made to provide compensation circuits to correct for other circuit problems such as component tolerances and temperature drift.
Consequently, a need exists for an improved time interval counter which overcomes the shortcomings of the prior art. In particular, there is a need for a time interval counter which utilizes an apparatus and method for determining the time interval between electronic pulses that allow an optimum balance to be achieved between measurement accuracy and circuit size, weight and power consumption requirements.